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M16C/29 Group
18. CRC Calculation Circuit
The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The microcomputer uses
a generator polynomial of CRC_CCITT (X
CRC code.
The CRC code is a 16-bit code generated for a block of a given data length in multiples of bytes. The code
is updated in the CRC data register everytime one byte of data is transferred to a CRC input register. The
data register must be initialized before use. Generation of CRC code for one byte of data is completed in
two machine cycles.
Figure 18.1 shows the block diagram of the CRC circuit. Figure 18.2 shows the CRC-related registers.
Figure 18.3 shows the calculation example using the CRC_CCITT operation.
18.1. CRC Snoop
The CRC circuit includes the ability to snoop reads and writes to certain SFR addresses. This can be
used to accumulate the CRC value on a stream of data without using extra bandwidth to explicitly write
data into the CRCIN register. For example, it may be useful to snoop the writes to a UART TX buffer ,
or the reads from a UART RX buffer.
To snoop an SFR address, the target address is written to the CRC snoop Address Register
(CRCSAR). The two most significant bits of this register enable snooping on reads or writes to the
target address. If the target SFR is written to by the CPU or DMA, and the CRC snoop write bit is set
(CRCSW=1), the CRC will latch the data into the CRCIN register. The new CRC code will be set in the
CRCD register.
Similarly, if the target SFR is read by the CRC or DMA, and the CRC snoop read bit is set (CRCSR=1),
the CRC will latch the data from the target into the CRCIN register and calculate the CRC.
The CRC circuit can only calculate CRC codes on data byte at a time. Therefore, if a target SFR is
accessed in a word (16 bit) bus cycle, only the byte of data going to or from the target snooped into
CRCIN, the other byte of the word access is ignored.
Figure 18.1 CRC circuit block diagram
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
Data bus high-order
Data bus low-order
Eight low-order bits
CRCD register (16)
CRC code generating circuit
16
12
5
16
x
+ x
+ x
+ 1 OR x
+ x
CRC input register (8)
(Address 03BE
Address Bus
page 306 of 402
16
12
5
+ X
+ X
+ 1) or CRC-16 (X
Eight high-order bits
(Address 03BD
15
2
+ x
+ 1
)
16
18. CRC Calculation Circuit
16
15
2
+ X
+ X
, 03BC
)
16
16
Snoop Address
Equal?
+ 1) to generate
SnoopB
lock
Snoop
enable
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