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M16C/29 Group
Flash memory control register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
0
Note 1:
When setting this bit to "1", set to "1" immdediately after setting it first to "0". Do not generate an
interrupt or a DMA transfer between setting the bit to "0" and setting it to "1". Set this bit while the
P8
flash memory in EW0 mode. Set this bit to read alley mode and "0"
Note 2:
Set this bit to "1" immediately after setting it first to "0" while the FMR01 bit is set to "1". Do not
generate an interrupt or a DMA transfer between setting this bit to "0" and setting it to "1".
Note 3:
Set this bit by a program in a space other than the flash memory.
Note 4: This bit is set to "0" by executing the clear status command.
Note 5: This bit is enabled when the FMR01 bit is set to "1" (CPU rewrite mode). This bit can be set to
"1" when the FMR01 bit is set to "1". However, the flash memory does not enter low-power
consumption status and it is not initialized.
Flash memory control register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Note 1:
Set this bit to "1" immediately after setting it first to "0". Do not generate an interrupt or a DMA
transfer between setting the bit to "0" and setting it to "1". Set this bit while the P8
when the NMI function is selected. If the FMR01 bit is set to "0", the FMR01 bit and FMR11 bit are
both set to "0"
Note 2: Set this bit to "1" immediately after setting it first to "0". Do not generate an interrupt or a DMA
transfer after setting to "0".
Note 3: When rewriting more than 100 times, set this bit to "1" (with wait state). When the FMR17 bit is "1"
(with wait state), regardless of the content of the PM17 bit, 1 wait is inserted at the access to the
block A and B.
Figure 21.5.1. Flash memory control register 0,1
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
Symbol
FMR0
Bit symbol
RY/BY status flag
FMR00
CPU rewrite mode select bit
FMR01
(Note1)
Block 0, 1 rewrite enable bit
FMR02
(Note 2)
Flash memory stop bit
FMSTP
(Note 3, 5)
Reserved bit
(b5-b4)
FMR06
Program status flag
FMR07
Erase status flag
/NMI/SD pin is "H" when selecting the NMI function. Set by program in a space other than the
5
Symbol
FMR1
Bit symbol
Reserved bit
(b0)
FMR11
EW1 mode select bit (Note1)
Reserved bit
(b3-b2)
Nothing is assigned. When write, set to "0".
(b4)
When read, its contect is indeterminate.
Reserved bit
(b5)
Block 0 to 5 rewrite enable
FMR16
bit (Note2)
Block A, B access wait bit (
FMR17
Note 3)
page 376 of 402
Address
After reset
01B7
XX000001
16
2
Bit name
0: Busy (during writing or erasing)
1: Ready
0: Disables CPU rewrite mode
(Disables software command)
1: Enables CPU rewrite mode
(Enables software commands)
Set write protection for user ROM area
(see Table 21.5.2.1)
0: Starts flash memory operation
1: Stops flash memory operation
(Enters low-power consumption state
and flash memory reset)
Set to "0"
0: Terminated normally
(Note 4)
1: Terminated in error
0: Terminated normally
1: Terminated in error
(Note 4)
Address
After reset
01B5
000XXX0X
16
2
Bit name
When read, its content is indeterminate
0: EW0 mode
1: EW1 mode
When read, its content is indeterminate
Set to "0"
Set write protection for user ROM area
(see Table 21.5.2.1)
0: Disable
1: Enable
0: PM17 enabled
1: With wait state (1 wait)
21. Flash Memory Version
Function
RW
RO
RW
RW
RW
RW
RO
RO
Function
RW
RO
RW
RO
RW
RW
RW
/NMI/SD pin is "H"
5
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