C0Ctlr Register - Renesas M16C/29 Series Hardware Manual

16-bit single-chip microcomputer
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M16C/29 Group

17.1.3.2. C0CTLR Register

Figures 17.7 shows the C0CTLR register.
CAN0 control register
b7
b6
b5
b4
b3
Note 1: When the Reset bit is set to "1" (CAN
Note 2: Change this bit only in the CAN reset/initialization mode.
Note 3: When using CAN0 wake-up interrupt, set these bits to "1".
(b15)
b7
b6
b5
b4
b3
Note 1: When the TSReset bit = 1, the C0TSR register is set to "0000
Note 2: When the RetBusOff bit = 1, the C0RECR and C0TECR register are set to "00
Note 3: Change this bit only in the CAN reset/initialization mode.
Note 4: When the listen-only mode is selected, do not request the transmission.
Figure 17.7 C0CTLR Register
Rev.1.00 Nov 01,2004
REJ09B0101-0100Z
b2
b1
b0
Symbol
C0CTLR
Bit symbol
Reset
LoopBack
MsgOrder
BasicCAN
BusErrEn
Sleep
PortEn
-
(b7)
reset/initialization mode), check that the State_Reset bit in the C0STR register is set to "1" (Reset mode).
(b8)
b2
b1
b0
Symbol
C0CTLR
Bit symbol
TSPreScale
Bit1, Bit0
TSReset
RetBusOff
-
(b4)
RXOnly
-
(b7-b6)
page 286 of 402
Address
After reset
0210
X0000001
16
Bit name
CAN module
0: Operation mode
reset bit
(Note 1)
1: Reset/initialization mode
Loop back mode
0: Normal operation mode
select bit
(Note 2)
1: Loop back mode
Message order
0: Word access
select bit
(Note 2)
1: Byte access
Basic CAN mode
0: Normal operation mode
select bit
(Note 2)
1: Basic CAN mode
Bus error interrupt
0: Bus error interrupt disabled
enable bit (Note 2)
1: Bus error interrupt enabled
Sleep mode
0: Sleep mode disabled
select bit (Notes 2, 3)
1: Sleep mode enabled; clock supply stopped
0: I/O port function
CAN port enable bit
(Notes 2, 3)
1: CTx/CRx function
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Address
After reset
0211
XX0X0000
16
Bit name
b1 b0
0 0: Period of 1 bit time
Time stamp
0 1: Period of 1/2 bit time
prescaler (Note 3)
1 0: Period of 1/4 bit time
1 1: Period of 1/8 bit time
0: Normal operation mode
Time stamp counter
1: Force reset of the time stamp counter
reset bit
(Note 1)
Return from bus off
0: Normal operation mode
command bit
1: Force return from bus off
(Note 2)
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Listen-only mode
0: Normal operation mode
select bit (Note 3)
1: Listen-only mode (Note 4)
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
". After this, the bit is automatically set to "0".
16
". After this, the bit is automatically set to "0".
16
17. CAN Module
2
Function
2
Function
RW
RW
RW
RW
RW
RW
RW
RW
-
RW
RW
RW
RW
-
RW
-

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