Can Interrupt - Renesas M16C/29 Series Hardware Manual

16-bit single-chip microcomputer

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M16C/29 Group

17.11. CAN Interrupt

The CAN module provides the following CAN interrupts.

• CAN0 Successful Reception Interrupt

• CAN0 Successful Transmission Interrupt

• CAN0 Error Interrupt

Error Passive State

Error BusOff State

Bus Error (this feature can be disabled separately)

• CAN0 Wake-up Interrupt

When the CPU detects the CAN0 successful reception/transmission interrupt request, the MBOX bit in the

C0STR register must be read to determine which slot has generated the interrupt request.

Rev.1.00 Nov 01,2004

REJ09B0101-0100Z

page 305 of 402

17. CAN Module

M16c series M16c/tiny series