Texas Instruments TMS320C6A816 Series Technical Reference Manual page 1944

C6-integra dsp+arm processors
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Registers
20.9.6.1.3 Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 15 (USBn_INTRTX)
The interrupt register for endpoint 0 plus transmit endpoints 1 to 15 (USBn_INTRTX) is a 16-bit
read-only register that indicates which interrupts are currently active for endpoint 0 and the TX
endpoints 1–15. Note also that all active interrupts are cleared when this register is read.
The interrupt register for endpoint 0 plus transmit endpoints 1 to 15 is shown in
described in
Table
Figure 20-147. Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 15 (USBn_INTRTX)
15
14
13
12
EP15TX EP14TX EP13TX EP12TX EP11TX EP10TX EP9TX
R-0-1h
R-0-1h
R-0-1h
R-0-1h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-163. Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 15 (USBn_INTRTX)
Bits
Field Name
15
EP15TX
14
EP14TX
:
:
4
EP4TX
3
EP3TX
2
EP2TX
1
EP1TX
0
EP0
1944
Universal Serial Bus (USB)
Preliminary
20-163.
11
10
9
8
EP8TX
R-0-1h
R-0-1h
R-0-1h
R-0-1h
Field Descriptions
Description
Transmit endpoint 15 interrupt active
Transmit endpoint 14 interrupt active
:
Transmit endpoint 4 interrupt active
Transmit endpoint 3 interrupt active
Transmit endpoint 2 interrupt active
Transmit endpoint 1 interrupt active
Endpoint 0 (transmit or receive) interrupt active
© 2011, Texas Instruments Incorporated
7
6
5
4
EP7TX
EP6TX
EP5TX
EP4TX
R-0-1h
R-0-1h
R-0-1h
R-0-1h
www.ti.com
Figure 20-147
and
3
2
1
0
EP3TX
EP2TX
EP1TX
EP0
R-0-1h
R-0-1h
R-0-1h
R-0-1h
SPRUGX9 – 15 April 2011
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