Usb1 Srp Fix Time Register (Usb1Srpfixtime); Usb1 Srp Fix Time Register (Usb1Srpfixtime) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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Registers
Table 20-115. USB1 Auto Req Register (USB1AUTOREQ) Field Descriptions (continued)
Bit
Field
3-2
Rx(N+1)_autoreq
1-0
Rx(N)_autoreq

20.9.2.2.18 USB1 SRP Fix Time Register (USB1SRPFIXTIME)

The USB1 SRP fix time register (USB1SRPFIXTIME) allows the CPU to configure the maximum
amount of time the SRP fix logic blocks the AVAID from the PHY to the OTG core. This time allows the
VBUS signal the ability to get below the thresholds and therefore remove the chance of voltage
bounces which could give false threshold measurements.
The USB1 SRP fix time register is shown in
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-116. USB1 SRP Fix Time Register (USB1SRPFIXTIME) Field Descriptions
Bits
Field
31-0
srpfixtime
1914
Universal Serial Bus (USB)
Preliminary
Value
00
01
10
11
00
01
10
11
Figure 20-104. USB1 SRP Fix Time Register (USB1SRPFIXTIME)
R/W-0280de80h
Description
SRP Fix maximum time in 60 MHz cycles. Default is 700 ms.
© 2011, Texas Instruments Incorporated
Description
RX endpoint N+1 Auto Req enable
No auto req
Auto req on all but EOP
Reserved
Auto req always
RX endpoint N Auto Req enable
No auto req
Auto req on all but EOP
Reserved
Auto req always
Figure 20-104
and described in
srpfixtime
www.ti.com
Table
20-116.
SPRUGX9 – 15 April 2011
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