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Table 20-131. CPPI DMA Scheduler Table Word N Register (WORDn) Field Descriptions
Bits
Field Name
7
entry0_rxtx
6-5
Reserved
4-0
entry0_channel
SPRUGX9 – 15 April 2011
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Preliminary
(continued)
Value
Description
This bit indicates if this entry is for a Tx or an Rx channel and is encoded as
follows:
0
Tx Channel
1
Rx Channel
0
Reserved
This field indicates the channel # that is to be given an opportunity to transfer
data. If this is a Tx entry, the DMA will be presented with a scheduling 'credit' for
that exact Tx channel. If this is an Rx entry, the DMA will be presented with a
scheduling credit for the Rx FIFO that is associated with this channel. For Rx
FIFOs which carry traffic for more than 1 Rx DMA channel, the exact channel
number that is given in the Rx credit will actually be the channel number which is
currently on the head element of that Rx FIFO, which is not necessarily the
channel number given in the scheduler table entry.
© 2011, Texas Instruments Incorporated
Registers
1927
Universal Serial Bus (USB)
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