Table of Contents
Advertisement
www.ti.com
20.9.2.2.8 USB1 IRQ_STATUS_0 Register (USBIRQSTAT0)
The USB1 IRQ_STATUS_0 register (USBIRQSTAT0) allows the USB1 interrupt sources to be manually
cleared when writing a 1 to a specific bit. A read of this register returns the USB1 interrupt event
pending value.
General actions per bit:
Write 0: No action
Write 1: Clear event
Read 0: No event pending
Read 1: Event pending
The USB1 IRQ_STATUS_0 register is shown in
31
30
RX EP 15
RX EP 14
R/W-0h
R/W-0h
23
22
RX EP 7
RX EP 6
R/W-0h
R/W-0h
15
14
TX EP 15
TX EP 14
R/W-0h
R/W-0h
7
6
TX EP 7
TX EP 6
R/W-0h
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-106. USB1 IRQ_STATUS_0 Register (USBIRQSTAT0) Field Descriptions
Bits
Field
31
RX EP 15
30
RX EP 14
29
RX EP 13
28
RX EP 12
27
RX EP 11
26
RX EP 10
25
RX EP 9
24
RX EP 8
23
RX EP 7
22
RX EP 6
21
RX EP 5
20
RX EP 4
19
RX EP 3
18
RX EP 2
17
RX EP 1
16
Reserved
15
TX EP 15
14
TX EP 14
13
TX EP 13
12
TX EP 12
11
TX EP 11
10
TX EP 10
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Preliminary
Figure 20-94. USB1 IRQ_STATUS_0 Register (USB1IRQSTAT0)
29
28
RX EP 13
RX EP 12
R/W-0h
R/W-0h
21
20
RX EP 5
RX EP 4
R/W-0h
R/W-0h
13
12
TX EP 13
TX EP 12
R/W-0h
R/W-0h
5
4
TX EP 5
TX EP 4
R/W-0h
R/W-0h
Description
Interrupt status for RX endpoint 15
Interrupt status for RX endpoint 14
Interrupt status for RX endpoint 13
Interrupt status for RX endpoint 12
Interrupt status for RX endpoint 11
Interrupt status for RX endpoint 10
Interrupt status for RX endpoint 9
Interrupt status for RX endpoint 8
Interrupt status for RX endpoint 7
Interrupt status for RX endpoint 6
Interrupt status for RX endpoint 5
Interrupt status for RX endpoint 4
Interrupt status for RX endpoint 3
Interrupt status for RX endpoint 2
Interrupt status for RX endpoint 1
Always read 0. Writes have no effect.
Interrupt status for TX endpoint 15
Interrupt status for TX endpoint 14
Interrupt status for TX endpoint 13
Interrupt status for TX endpoint 12
Interrupt status for TX endpoint 11
Interrupt status for TX endpoint 10
© 2011, Texas Instruments Incorporated
Figure 20-94
and described in
27
26
RX EP 11
RX EP 10
R/W-0h
R/W-0h
19
18
RX EP 3
RX EP 2
R/W-0h
R/W-0h
11
10
TX EP 11
TX EP 10
R/W-0h
R/W-0h
3
2
TX EP 3
TX EP 2
R/W-0h
R/W-0h
Registers
Table
20-106.
25
24
RX EP 9
RX EP 8
R/W-0h
R/W-0h
17
16
RX EP 1
Reserved
R/W-0h
R-0h
9
8
TX EP 9
TX EP 8
R/W-0h
R/W-0h
1
0
TX EP 1
TX EP 0
R/W-0h
R/W-0h
1895
Universal Serial Bus (USB)
Advertisement
Table of Contents
