16-Bit Free-Run Timer - Fujitsu F2MC-16LX Hardware Manual

12.2.1

16-bit Free-run Timer

The 16-bit free-run timer consists of a 16-bit up-down counter and control status
register.
A value of the timer counter is used as a basic time of the input capture and output
compare (base timer).
• Clock for the counter operation can be selected from eight types.
• The counter overflow interruption can be generated.
• Setting the mode enables initialization of the counter through match operation with
the value of the compare clear register in the output compare.
Register List of 16-bit Free-run Timer
Figure 12.2-4 lists the 16-bit free-run timer registers.
15
CL15 CL14 CL13 CL12 CL11 CL10 CL09 CL08
00008B
H
R/W R/W
7
CL07 CL06 CL05 CL04 CL03 CL02 CL01 CL00
00008A
H
R/W R/W
15
T15
000087
H
R/W R/W
7
T07
000086
H
R/W R/W
15
ECKE
000089
H
R/W R/W
7
000088 IVF IVFE STOP MODE CLR CLK2 CLK1 CLK0
H
R/W R/W
Figure 12.2-4 Register List of 16-bit Free-run Timer
14 13 12 11
R/W R/W R/W
6 5 4 3
R/W R/W R/W
14 13 12 11
T14 T13 T12 T11
R/W R/W R/W
6 5 4 3
T06 T05 T04 T03
R/W R/W R/W
14 13 12 11
MSI2 MSI1 MSI0 ICLR ICRE
R/W R/W R/W
6 5 4 3
R/W R/W R/W
10 9 8
CPCLR
Compare clear register upper
Initial value
R/W R/W R/W
2 1 0
CPCLR
Compare clear register lower
Initial value
R/W R/W R/W
10 9 8 TCDT
Timer counter data register upper
T10 T09 T08
R/W R/W R/W
Initial value
2 1 0 TCDT
T02 T01 T00 Timer counter data register lower
R/W R/W R/W Initial value
10 9 8
TCCS
Timer control status register upper
Initial value
R/W R/W R/W
2 1 0
TCCS
Timer control status register lower
Initial value
R/W R/W R/W
CHAPTER 12 16-BIT I/O TIMER
XXXXXXXX
B
XXXXXXXX
B
00000000
B
00000000
B
0XX00000
B
00000000
B
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