Reset Of Usb Bus - Fujitsu F2MC-16LX Hardware Manual

14.5.2

Reset of USB Bus

When you set the URST bit of the host control register 0 (HCNT0) to "1" in the host
mode, it sends out SE0 for not less than 10 ms and resets the USB bus. When the USB
bus has been reset, it sets back the URST bit of the host control register to "0" and
generates an interrupt and the URIRQ bit of the host interrupt register (HIRQ) is set to
"1" when the URIRE bit of the host control register 0 (HCNT0) is "1." If you clear the
interrupt, write "0" to the URIRQ bit of the host interrupt register (HIRQ).
Notes before and after Reset of USB Bus
Please note the following points about reset of USB bus.
1. Before the USB bus is reset, confirm that the device is connected to and the CSTAT bit of the host state
status register (HSTATE) is set to "1".
2. When you reset the USB bus, the CSTAT bit of the host state status register (HSTATE) turns to "0" and
the USB device is put into disconnection status. Then, the DIRQ bit of the host interrupt control register
(HIRQ) does not become "1".
3. After the USB bus is reset, you must update the CLKSEL bit of the host state status register (HSTATE)
to match the TMODE bit of the same register if you compare them and they do not match. Before you
update the CLKSEL bit, ensure that the RST bit of the UDC control register (UDCC) is "1".
Terminal D+ for Mini-HOST
Terminal D- for Mini-HOST
URST bit of HCNT
CSTAT bit of HSTATE
URIRQ bit of HIRQ
(HCNT URIRE="1")
Figure 14.5-2 Reset Timing Example to Device
Write "1" to HCNT URST bit
CHAPTER 14 USB Mini-HOST
10µs
2.5µs
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