Fujitsu F2MC-16LX Hardware Manual page 703

Timer Value
Timer Value and Reload Value
Timing
Writing Timing to Reload Register
Timing Limit Over Flag
Transition State of Timing Limit Over Flag (DQ5)
TMCSR
Timer Control Status Register 0 to 2
(TMCSR0 to TMCSR2)
TMD Bit
Priority Level of STP,SLP,and TMD Bit
TMR
16-bit Timer Register 0 to 2 (TMR0 to TMR2)
16-bit Timer Register 0 to 2 (TMR0 to TMR2)/
16-bit Reload Register 0 to 2
(TMRLR0 to TMRLR2)
TMRLR
16-bit Reload Register 0 to 2
(TMRLR0 to TMRLR2)
16-bit Timer Register 0 to 2 (TMR0 to TMR2)/
16-bit Reload Register 0 to 2
(TMRLR0 to TMRLR2)
TMSP
Time Stamp Register (TMSP)
Toggle Bit 2 Flag
Transition State of Toggle Bit 2 Flag (DQ2)
Toggle Bit Flag
Transition State of Toggle Bit Flag (DQ6)
Token
........................................ 353
IN,OUT,SETUP Token
........................................................ 354
SOF Token
Token Packet
....................................... 340
Setting of Token Packet
Transfer Mode
Data Number Automatic Transfer Mode
.......................................... 308
NULL Transfer Mode
.......................................... 304
Packet Transfer Mode
Transfer Speed
Acquiring Transfer Speed of Destination USB Device and
Selecting Clock
Transition
State Transition of Counter Operation
Transition to Sleep Mode
Transition State
Transition State of Sector Erasing Timer Flag
................................................. 575
(DQ3)
Transition State of Timing Limit Over Flag (DQ5)
Transition State of Toggle Bit 2 Flag (DQ2)
U
UART
Example of UART Programming
2
Interruption of UART,EI
......................................... 482
List of UART Register
......................................... 517
Notes on Using UART
............................................ 504
Operation of UART
UART Baud Rate Selection
.............................. 373
......................... 420
..... 574
.......................... 389
.................. 149
.......... 393
.......................... 393
.......................... 394
.......................... 393
................................ 279
............. 576
................ 573
.................. 305
..................................... 337
..................... 396
...................................... 152
..... 574
............. 576
........................... 518
OS, and µDMAC
.............. 495
.................................. 500
..........................................478
UART Block Diagram
UART Block Diagram of USB Mini-HOST
2
.........................................495
UART EI OS Function
..................................................476
UART Function
..................................................494
UART Interrupt
........................................................481
UART Pins
UART Prescaler Control Register
UART Prescaler Control Register 0 to 3 (UTCR0 to
UTCR3) and UART Prescaler Reload Register 0
to 3 (UTRLR0 to UTRLR3)
UDC Control Register
UDC Control Register (UDCC)
UDC Interruption Permission Register
UDC Interruption Permission Register (UDCIE)
UDC Status Register
UDC Status Register (UDCS)
UDCC
UDC Control Register (UDCC)
UDCIE
UDC Interruption Permission Register (UDCIE)
UDCS
UDC Status Register (UDCS)
Undefined Instruction
Exception due to Execution of an Undefined
............................................103
Instruction
Execution of an Undefined Instruction
USB
Acquiring Transfer Speed of Destination USB Device and
Selecting Clock
Block Diagram of USB Function
Connected Detection of External USB Device
Disconnection Status,Connection Status of the External
..........................................337
USB Device
.......................................311
Diversity with USB Host
Feature of USB Mini-HOST
Features of USB Function
Notes before and after Reset of USB Bus
Operation of USB Function
Register List of USB Function
Register of USB Mini-HOST
UART Block Diagram of USB Mini-HOST
USB Interrupt
Type and Function of USB Interrupt
User Power
Connection Example in Single-chip Mode
(when Using User Power)
Example of Minimum Connection to Flash Microcomputer
Programmer (when Using User Power)
User Stack Pointer
User Stack Pointer (USP) and
System Stack Pointer (SSP)
USP
User Stack Pointer (USP) and
System Stack Pointer (SSP)
UTCR
UART Prescaler Control Register 0 to 3 (UTCR0 to
UTCR3) and UART Prescaler Reload Register 0
to 3 (UTRLR0 to UTRLR3)
INDEX
..............312
......................492
..............................271
........284
................................280
..............................271
........284
................................280
.....................103
......................................337
............................267
............337
..................................310
.....................................266
..................339
...................................296
................................268
.................................313
..............312
........................613
.........................593
........595
........................35
........................35
......................492
687