Fujitsu F2MC-16LX Hardware Manual page 699

16-bit microcontroller mb90330 series
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Port 0 Pull-up Resistance Register
Port 0,1 Pull-up Resistance Register (RDR0,RDR1)
Port 1
Port 0,1 Pull-up Resistance Register (RDR0,RDR1)
Port 1 Pull-up Resistance Register
Port 0,1 Pull-up Resistance Register (RDR0,RDR1)
Port 4
Port 4 Output Terminal Register (ODR4)
Port 4 Output Terminal Register
Port 4 Output Terminal Register (ODR4)
Port Data Register
Port Data Register (PDR0 to PDRB)
Port Direction Register
Port Direction Register (DDR0 to DDRB)
PPG
......................................... 417
PPG Output Operation
PPG0 to PPG5 Output Control Register
(PPG01/PPG23/PPG45)
PPG0/2/4 Operation Mode Control Register
(PPGC0/PPGC2/PPGC4)
PPG1/PPG3/PPG5 Operation Mode Control Register
(PPGC1/PPGC3/PPGC5)
PPG Reload Registers
PPG Reload Registers
(PRLL0 to PRLL5,PRLH0 to PRLH5)
PPG Timer
Block Diagram of 8/16-bit PPG Timer
Interrupts of 8/16-bit PPG Timer
Outline of Operation of 8/16-bit PPG Timer
Overview of 8/16-bit Timer PPG Timer
Register List of 8/16-bit PPG Timer
PPGC
PPG0/2/4 Operation Mode Control Register
(PPGC0/PPGC2/PPGC4)
PPG1/PPG3/PPG5 Operation Mode Control Register
(PPGC1/PPGC3/PPGC5)
Prefix
............................................. 46
Array of Prefix Code
................................................ 43
Bank Select Prefix
Common Register Bank Prefix (CMR)
Constraints on Interrupt Suppression Instructions and
Prefix Instructions
Flag Change Suppression Prefix (NCC)
Prefix Code
............................................. 46
Array of Prefix Code
Prefix Instructions
Constraints on Interrupt Suppression Instructions and
Prefix Instructions
Presentation
Description of Instruction Presentation Items and
.............................................. 633
Symbols
Priority
Priority Level of STP,SLP,and TMD Bit
PRLH
PPG Reload Registers
(PRLL0 to PRLL5,PRLH0 to PRLH5)
... 202
... 202
... 202
................. 202
................. 202
....................... 200
................ 201
.......................... 413
........................ 408
........................ 410
........ 415
..................... 405
............................ 419
.............. 416
................... 404
........................ 407
........................ 408
........................ 410
...................... 44
.................................... 46
..................... 44
.................................... 46
.................. 149
........ 415
PRLL
PPG Reload Registers
(PRLL0 to PRLL5,PRLH0 to PRLH5)
Processing Time
Extended Intelligent I/O Service (EI
Time (Time for One Transfer)
Hardware Interrupt Processing Time
Processor Status
.............................................36
Processor Status (PS)
Product
.......................................................5
Product Lineup
Program
..............................................555
Program Execution
Program Bank Register
Program Bank Register (PCB)<Initial Value: Value in Reset
..................................................40
Vector>
Program Counter
............................................39
Program Counter (PC)
Program Example
Program Example for Address Match Detection
...............................................561
Function
Program Example of Interrupt Processing
Program Example of Timebase Timer
Program Examples
Program Examples of Watchdog Timer
Programming
Example of UART Programming
Pins Used for Fujitsu Standard Serial On-board
........................................589
Programming
Programming Operation
At Programming Operation
Protection Function
A/D-converted Data Protection Function
PS
.............................................36
Processor Status (PS)
Pulse
Calculation Method of Pulse Width/cycle
Pin Output Control of Pulse
Range of Count at Pulse Width/cycle
Pulse Width
Calculation Method of Pulse Width/cycle
Minimum Input Pulse Width
Operation Flow of Pulse Width Measurement
Range of Count at Pulse Width/cycle
Relation between Reload Value and Pulse Width
Pulse Width Measurement
Operation of Pulse Width Measurement Function
Startup and Stop of Timer/Pulse Width
.........................................371
Measurement
PWC
PWC Ratio of Dividing Frequency Control Register
................................................365
(DIVR)
PWC Control Status Register
PWC Control Status Register (PWCSR)
PWC Data Buffer Register
PWC Data Buffer Register (PWCR)
INDEX
........415
2
OS) Processing
.....................83
..........................70
.................106
......................217
....................229
............................518
....................................572
..................446
.................378
...................................418
.......................379
.................378
..................................378
............380
.......................379
........417
.......368
...................359
........................364
683

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