Interrupt Control Registers (Icr00 To Icr15) - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 3 INTERRUPT
3.3.1

Interrupt Control Registers (ICR00 to ICR15)

Interrupt control registers (ICR00 to ICR15) associated with all the peripheral functions
provided with the interrupt function, controls the handling which takes place when an
interrupt request is generated. Some functions of the registers are different between
write and read.
Interrupt Control Registers (ICR00 to ICR15)
Figure 3.3-1 Interrupt Control Register (ICR00 to ICR15) at Writing
At write
MSB
Address
0000B0
H
to ICS3 ICS2 ICS1
0000BF
H
MSB
: The most significant bit
LSB
: The least significant bit
: Initial value
56
LSB
ICS0 ISE IL2 IL1
IL2 IL1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
ISE
0
Activate interrupt sequence during generation of an interrupt.
1
Activate EI
ICS3 ICS2 ICS1ICS0
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
Initial value
00000111
IL0
B
IL0 Interrupt level set bit
0 Interrupt level 0 (Highest)
1
0
1
0
1
0
Interrupt level 7 (No interrupt)
1
2
EI OS enable bit
2
OS during generation of an interrupt.
2
EI OS channel select bit
Descriptor address
Channel
0 000100
0 0
0 1
1
000108
1 0
2 000110
1 1
3
000118
0 0
4
000120
0 1
5
000128
1 0
6 000130
1 1
7
000138
0 0
8 000140
0 1
9
000148
1 0
10
000150
1 1
11 000158
0 0
12
000160
0 1
13
000168
1 0
14
000170
1 1
15
000178
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H