Fujitsu F2MC-16LX Hardware Manual page 502

CHAPTER 21 UART
Table 21.4-2 Functional Description of Each Bit in Serial Mode Register 0 to 3 (SMR0 to SMR3)
Bit name
MD1, MD0:
bit7
Operating mode
bit6
selection bits
SCKL:
bit5 Serial clock
output level set bit
M2L2, M2L1,
bit4 M2L0:
bit3 Synchronous
bit2 mode transfer
numerical set bits
SCKE:
Serial clock
bit1
input/output
enable bit
SOE:
bit0 Serial data output
enable bit
486
• Set Operating mode
Note:
- In operation mode 1, the device can be used only as the master for master/slave
communication. In operation mode 1, the address/data bit as bit 9 cannot be received, so
the device cannot be used as the slave.
- In operation mode 1, set the parity addition enable bit to no parity (SCR0 to SCR3: PEN =
0) as the parity check function cannot be used.
• When communication is performed in the clock synchronous mode, serial clock output level
at non-operating is set.
• When set to "0": Output of serial clock is "L" level.
• When set to "1": Output of serial clock is "H" level.
• Specify the number of bits transferred in the synchronous communication mode.
• It is invalid at the asynchronous communication mode.
• When set to "000
": Specify as 8-bit transmission.
B
• When set to "001
": Specify as 1-bit transmission.
B
• When set to "010
": Specify as 2-bit transmission.
B
• When set to "011
": Specify as 3-bit transmission.
B
• When set to "100
": Specify as 4-bit transmission.
B
• When set to "101
": Specify as 5-bit transmission.
B
• When set to "110
": Specify as 6-bit transmission.
B
• When set to "111
": Specify as 7-bit transmission.
B
• Switch between input and output of the serial clock.
• When the bit is set to "0":The pin is set as a general-purpose I/O port or serial clock input
• When the bit is set to "1":The pin is set as a serial clock output pin.
Note:
- When using the SCK0 to SCK3 pin as the serial clock input (SCK=0), set the pin to the
input port using the port direction register (DDR). Also, use the clock input source select
bit to select the external clock (UTCR0 to UTCR3: CKS=1
- When using this as serial clock output, set the clock input source selection bit to the
dedicated baud rate generator (UTCR0 to UTCR3: CKS=0
- When SCK pins (0 to 3) are set to serial clock output, they function as serial clock output
pins, regardless of the settings of the generic input-output port.
• Enable or disable output of serial data.
• When the bit is set to "0": The pin is set as a general-purpose I/O port.
• When the bit is set to "1": The pin is set as a serial data output pin.
• When SOT pins (0 to 3) are set to serial data output, they function as serial clock output
pins, regardless of the settings of the generic input-output port.
Functions
pin.
).
B
).
B