A/D-Converted Data Protection Function - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 19 8/10-BIT A/D CONVERTER
19.4.2

A/D-converted Data Protection Function

When the A/D conversion is executed in the interrupt enable status, the conversion data
protection function works.
A/D-converted Data Protection Function
Since this A/D converter has only one data register to store the converted data, the A/D conversion
operation rewrites the data stored in data register at the conversion termination. Therefore, when the
converted data transfer to the memory is delayed, a part of previous data may be lost. To cope with this
problem, when the interrupt is enabled (INTE = 1), the data protection function operates as follows:
Data protection function when µDMAC or EI
When the converted data is stored in the A/D data register (ADCR), the INT bit of the A/D control status
register "H" level (ADCS1) is set to "1". While this INT bit is set to "1", the A/D conversion is in the
temporally stopped state. When the INT bit is cleared after the A/D data register (ADCR) transferred to the
memory, etc. in the interrupt routine, the stopped state is released.
Data protection function when µDMAC or EI
When the µDMAC or EI
status register "H" level (ADCS1) is set to "1" in the period from the conversion termination to the
completion of converted data transfer from the data register to the memory with the µDMAC or EI
A/D conversion operation is stopped, and the next conversion data is not stored. When the data transfer to
the memory is completed, the PAUS bit is cleared to "0" and the conversion operation is restarted. Figure
19.4-5 shows the flow of the data protection function when using the µDMAC or EI
446
2
OS is not used
2
OS is used
2
OS is used to specify the continuous conversion, the PAUS bit of A/D control
2
OS, the
2
OS.