Watch Timer Control Register (Wtc) - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 11 WATCH TIMER
11.3

Watch Timer Control Register (WTC)

Watch timer control register (WTC) controls the operation of watch timer. It also
controls the interval interrupt time.
Configuration of Watch Timer Control Register (WTC)
Figure 11.3-1 shows the watch timer control register (WTC) configuration. Table 11.3-1 summarizes the
functions of each bit functions of watch timer control register (WTC).
Figure 11.3-1 Configuration of Watch Timer Control Register (WTC)
bit15
Address
0000AA
H
R/W : Readable/Writable
R : Write only
: Initial value
234
bit8 bit7 bit6 bit5 bit4
WDCS SCE WTIE WTOF WTR WTC2 WTC1 WTC0
R/W R R/W R/W
WTC2 WTC1 WTC0
0
0
0
0
1
1
1
1
WTR
0
1
WTOF
0
1
WTIE
0
1
SCE
0
1
WDCS
0
1
bit3 bit2 bit1 bit0
Initial value
R/W R/W R/W R/W
Watch timer interval selection bit
Interval time
(Sub clock: 32kHz)
31.5 ms
0 0
62.5 ms
0 1
125 ms
1 0
1 1
250 ms
0 0 500 ms
1000 s
0 1
1 0
2000 s
Setting disabled
1 1
Watch counter clear bit
Clear all bits of counter in Watch timer to "0"
No effect
Watch timer interrupt request flag bit
No interrupt request generation
Interrupt request generation
Watch timer interval interrupt enable bit
Interrupt disabled
Interrupt enabled
Sub clock oscillation stabilization wait time end bit
Oscillation stabilization wait period
Oscillation stabilization wait period termination
Watchdog timer clock source selection bit
Select clock of Wacth timer
Select clock of Timebase timer
10001000
B