Sof Interrupt - Fujitsu F2MC-16LX Hardware Manual
16-bit microcontroller mb90330 series
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Also See for F2MC-16LX:
- Hardware manual (598 pages) ,
- Application note (13 pages) ,
- Operation manual (10 pages)
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14.5.7
SOF Interrupt
Once you have set the SOFIRE bit of the host control register 0 (HCNT0) to "1", it sets
the SOFIRQ bit of the host interrupt register (HIRQ) to "1" and will generate an interrupt
when starting an SOF with the SOFSTEP bit of the host control register 1 (HCNT1) and
the SOF interrupt FRAME comparison register (HFCOMP). The SOF execution with the
host token endpoint register (HTOKEN) does not set the SOFIRQ bit of the host
interrupt register (HIRQ) to "1".
SOF Interrupt
Once you have set the SOFIRE bit in host control register 0 (HCNT0) to "1", an interrupt is generated when
sending an SOF, and the SOFIRQ bit in the host interrupt register (HIRQ) is set to "1". You can select one
of an SOF interrupt conditions: One is generation of an SOF interrupt every time an SOF is sent out with
the setting of the SOFSTEP bit of the host control register 1 (HCNT1) and another generation is due to the
Frame number in the lower 8 bits indicated by the SOF interrupt FRAME comparison register (HFCOMP).
For " 0 " the SOFSTEP bit of host control register 1(HCNT1)
SOFIRQ bit of HIRQ
For " 0 " the SOFSTEP bit of host control register 1(HCNT1)
HFRAME
HFCOMP
SOFIRQ bit of HIRQ
If you set the CANCEL bit of the host control register 1 (HCNT1) to "1" and set a token other than an SOF
token in the host token endpoint register (HTOKEN) in the EOF area, and the SOFIRQ bit of the host
interrupt register (HIRQ) is set to "1" in the next SOF, the token is not executed and the TKNEN bits of the
HTOKEN are set to (000
Canceling the token can be known by the TCAN bit of the HIRQ when the SOFIRQ bit becomes "1". If
you execute the token again, write "0" to the TCAN bit of the HIRQ, and write the token to be executed to
the TKNEN bit of HTOKEN.
Figure 14.5-6 SOF Interrupt
The SOF
transmission
Soft clear
The SOF
transmission
(010
)
H
). Then, the CMPIRQ bit of the host interrupt register (HIRQ) does not become "1".
B
CHAPTER 14 USB Mini-HOST
(011
)
H
(011
)
H
HFRAME lower 8 bit and
HFCOMP is corresponding.
following SOF
transmission
Soft clear
following SOF
transmission
345
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