Fujitsu F2MC-16LX Hardware Manual page 310

CHAPTER 13 USB FUNCTION
[bit 9] SPK: Short packet interrupt request bit
It indicates that the number of pieces of transfer data that has been successfully received from the host
is less than a maximum number of packets set the PKS in the EP1 to EP5 control register (EP1C to
EP5C) (including 0 packet). The SPK bit is a interrupt factor and writing "1" is ignored. Please clear by
writing "0". "1" is read at the read modification write.
SPK
0
1
Note:
The SPK bit is not set when data toward IN is transferred.
[EP2 to EP5: bit 8, bit 7] Reserved bit
In EP2 to EP5, these bits are reserved bits. Writing has no effect to the operation. When reading, "0"
can be read.
[(EP1:bit 8, bit 7) bit 6 to bit 0] SIZE: Packet size display bit
It displays the number of data bytes that have been written into the receive buffer when OUT packet
transfer for EP1 to EP5 has been completed. The SIZE bit is updated to a valid value when the interrupt
factor for DRQ in the EP1 to EP5 status register (EP1S to EP5S) has been set.
The following lists each maximum number of transfer data for EndPoint1 to 5.
EndPoint
1
2 to 5
Note:
Since the SIZE bit is set to the number of pieces of data that are written into the buffer from the
HOST for the OUT direction transfer, any value read from the SIZE bit when IN direction is under
way has no meaning.
294
MAX. number of transfer packets received
Data less than the MAX. number of transfer packets received
Max. number of transfer
256 Bytes
64 Bytes
Operating mode
Range of display
000
H
00
H
to 100
H
to 40
H