Serial Mode Control Status Register (Smcs) - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 20 EXTENDED I/O SERIAL INTERFACE
20.2.1

Serial Mode Control Status Register (SMCS)

The configuration and functions of Serial mode control status register (SMCS) is
described.
Serial Mode Control Status Register (SMCS)
Serial mode control status register (SMCS) is a register which controls the transfer operating mode of serial
I/O.
Figure 20.2-2 shows the bit configuration of serial mode control status register (SMCS).
Figure 20.2-2 Bit Configuration of Serial Mode Control Status Register (SMCS)
SMCS
Address : 000059
SMCS
: 000058
Address
R/W : Readable/Writable
: Undefined
Function of each bit of serial mode control status register (SMCS) is described as follows:
[bit 15 to bit 13] SMD2,SMD1,SMD0:Serial Shift Clock Mode (shift clock selection)
The serial shift clock mode is selected.
Table 20.2-1 and Table 20.2-2 show the settings of the serial shift clock mode.
Table 20.2-1 Serial Shift Clock Mode Selection
SMD2
0
0
0
0
1
1
1
1
462
15 14 13 12
SMD2 SMD1 SMD0 SIE
H
(R/W) (R/W) (R/W) (R/W) (R/W)
5
7 6
H
f=24 MHz
SMD1 SMD0
div=8
0 0 1.5 MHz
0 1 750 kHz
1 0 188 kHz
1 1 93.4 kHz
0 0 46.9 kHz
0 1
1 0
1 1
11 10 9
SIR BUSY STRT
STOP
(R) (R/W) (R/W)
3 2
4 1
MODE BDS SOE SCOE
(R/W) (R/W) (R/W) (R/W)
f=12 MHz
div=4
1.5 MHz
750 kHz
188 kHz
93.4 kHz
46.9 kHz
External shift clock mode
Setting disabled
Setting disabled
8
Serial mode control
status register
00000010
Initial value
0
Serial mode control
status register
XXXX0000
Initial value
f=6 MHz Value of dividing
div=6 frequency
500 kHz 2
250 kHz 4
62.5 kHz 16
31.2 kHz 32
15.6 kHz 64
B
B