Ready Function - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 7 MODE SETTING
7.5.2

Ready Function

The setting of the P56/RDY pin or the automatic ready function selection register
(ARSR) enables the access to the low-speed memory and the peripheral circuits. When
the RYE bit in the bus control signal selection register (EPCR) is set to "1", the
condition is in the wait cycle while the period "L" level is being input to the P56/RDY pin
at the time of accessing to the external area, and then it is possible to extend the
access cycle.
Ready Function
2
The F MC-16LX has two built-in auto-ready functions for the external memory. The auto-ready function
inserts the wait cycle of 1 to 3 cycles without the external circuit and extends the access cycle, when an
access to the lower address external area located between the addresses 007100
extend I/O area 007900
external area located between the addresses 800000
activated by the setting of the LMR1/LMR0 bit (lower address external area) in the ARSR and the HMR1/
HMR0 bit (upper address external area) in the ARSR.
In the auto-ready functions for the external memory or the external I/O, when the RYE bit in the EPCR is
set to "1", the wait cycle is maintained if the "L" level is input into the P56/RDY pin after the wait cycle
ends by the above auto-ready function.
The timing charts of the ready functions in the non-multiplex mode and the multiplex mode are illustrated
below. In both modes, the above chart does not set the ready function; the following chart sets this function.
Note:
When inputting from the RDY pin, note that the device may run away if the AC standard is not
satisfied.
192
to 007FFF is disable) is generated, and when an access to the upper address
H H
to FFFFFF is generated. The auto-ready function is
H H
to 7FFFFF (however, the
H H