Fujitsu F2MC-16LX Hardware Manual page 76

16-bit microcontroller mb90330 series
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CHAPTER 3 INTERRUPT
Table 3.3-3 Correspondence between EI
ICS3
ICS2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
2
EI
OS status bits (S1 and S0)
It is a bit only for reading. By examining the value at the end of EI
termination status can be determined. The bit is initialized to "00
relationships between the S0/S1 bit and the EI
Table 3.3-4 Relation between EI
S1
0
0
1
1
60
2
OS Channel Select Bits and Descriptor Addresses
ICS1
ICS0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
2
OS Status Bits and EI
S0
0
When EI
1
Stop state by end of counting
0
Reserved
1
Stop state by request from peripheral function
Channel to be selected
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
2
2
OS status.
2
OS Status
2
EI
OS status
2
OS in operation or not started.
Descriptor address
000100
H
000108
H
000110
H
000118
H
000120
H
000128
H
000130
H
000138
H
000140
H
000148
H
000150
H
000158
H
000160
H
000168
H
000170
H
000178
H
OS operation, the operating state and/or
" at a reset. Table 3.3-4 shows the
B

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