Fujitsu F2MC-16LX Hardware Manual page 153

Figure 5.4-1 State Transition Diagram of Machine Clock Selection
Main
MCS=1
MCM=1
SCS=1
SCM=1
CS1, CS0= xx
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
MCS
MCM
SCS
SCM
CS1, CS0
Note:
The initial value for machine clock is the main clock (MCS = 1, SCS = 1).
If both the SCS and MCS bits are "0", the higher priority is given to SCS and the sub clock mode is
entered.
When the mode needs to be switched from sub to PLL, the oscillation stabilization wait time
selection bits (WS1, WS0) of CKSCR must be set to "01
(7)
(1)
(5)
Main PLLx
(3)
MCS= 0
(4)
MCM=1
SCS=1
SCM=1
(6)
CS1, CS0= xx
PLL1 Main
MCS=1
MCM= 0
SCS=1
SCM=1
(6)
CS1, CS0= 00
Main
PLL2
MCS=1
MCM= 0
SCS=1
SCM=1
(6)
CS1, CS0= 01
PLL4 Main
MCS=1
MCM= 0
SCS=1
SCM=1
(6)
CS1, CS0= 10
MCS bit "0" write
PLL clock oscillation stabilization wait end & CS1, CS0=00
PLL clock oscillation stabilization wait end & CS1, CS0=01
PLL clock oscillation stabilization wait end & CS1, CS0=10
MCS bit "1" write (within Watchdog reset)
Synchronous timing of PLL clock and Main clock
SCS bit "0" write
Sub clock oscillation stabilization wait end (max. 2
SCS bit "1" write
Main clock oscillation stabilization wait end
Main clock oscillation stabilization wait end & CS1, CS0=00
Main clock oscillation stabilization wait end & CS1, CS0=01
Main clock oscillation stabilization wait end & CS1, CS0=10
SCS bit "1" write, MCS bit "0" write
Synchronous timing of PLL clock and Sub clock
: PLL clock selection bit of Clock selection register (CKSCR)
: PLL clock display bit of Clock selection register (CKSCR)
: Sub clock selection bit of Clock selection register (CKSCR)
: Sub clock display bit of Clock selection register (CKSCR)
: Multiplication factor selection bit of Clock selection register (CKSCR)
Main Sub
MCS=1
MCM=1
SCS= 0
SCM=1
(8)
(9)
CS1, CS0= xx
Main
MCS=1
MCM=1
(10)
(7)
SCS=1
SCM=1
(2) (11)
CS1, CS0= xx
(12)
(13)
PLL1 multiplication
MCS= 0
MCM= 0
SCS=1
(5) (7)
SCM=1
CS1, CS0= 00
PLL2 multiplication
MCS= 0
MCM= 0
SCS=1
(5) (7)
SCM=1
CS1, CS0= 01
PLL4
multiplication
MCS= 0
MCM= 0
SCS=1
(5) (7)
SCM=1
CS1, CS0= 10
15
/SCLK)
", "10
B
CHAPTER 5 CLOCK
Sub
MCS=1
MCM=1
(14)
SCS= 0
(9)
SCM= 0
CS1, CS0= xx
(7)
Sub
PLLx
MCS= 0
MCM=1
SCS= 1
SCM= 0
(15)
CS1, CS0= xx
Sub
PLL1
MCS=1
MCM= 0
SCS= 0
SCM=1
(15)
CS1, CS0= 00
PLL2 Sub
MCS=1
MCM= 0
SCS= 0
SCM=1
(15)
CS1, CS0= 01
PLL4 Sub
MCS=1
MCM= 0
SCS= 0
SCM=1
(15)
CS1, CS0= 10
", or "11 ".
B B
137