Configuration Of 8/10-Bit A/D Converter - Fujitsu F2MC-16LX Hardware Manual

19.2

Configuration of 8/10-bit A/D Converter

8/10-bit A/D converter is composed of the following 9 blocks.
• A/D control status register (ADCS)
• A/D data register (ADCR)
• A/D conversion channel set register (ADMR)
• Decoder
• Analog channel selector
• Sample hold circuit
• D/A converter
• Comparator
• Control circuit (Sequential comparison register)
Block Diagram of 8/10-bit A/D Converter
P70/AN0
to
P87/AN15
Figure 19.2-1 Block Diagram of 8/10-bit A/D Converter
MPX
Comparator
Sample & Hold circuit
Timer start
PPG1 output
Trigger start
P96/ADTG/FRCK
φ
CHAPTER 19 8/10-BIT A/D CONVERTER
AVcc
AVRH
D/A converter
Control circuit
A/D data register
ADCR1, ADCR0
A/D conversion channel set register
A/D Control status register upper
A/D Control status register lower
Prescaler
AVss
ADMR
ADCS1, ADCS0
Operation clock
431