Fujitsu F2MC-16LX Hardware Manual page 87

16-bit microcontroller mb90330 series
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Interrupt handling time (θ machine cycle)
The CPU must save the dedicated registers in the system stack, fetch the interrupt vectors, and execute
other processes by acceptance of the interrupt request. To do so, it requires the interrupt handling time with
the θ machine cycles. The interrupt handling time can be calculated by the expression shown below.
• When an interrupt is activated: θ = 24 + 6 × Z machine cycles
• When an interrupt is returned: θ = 11 + 6 × Z machine cycles (RETI instructions)
The interrupt handling time depends on the address to which the stack pointer points. Table 3.4-3 shows the
compensation values (Z) of the interrupt handling time.
One machine cycle is equal to one clock cycle of the machine clock (φ).
Table 3.4-3 Compensation Value of Interrupt Handling Time (Z)
Address which stack pointer indicates
For the external 8-bit
For the external even address
For the external odd address
For internal even address
For internal odd address
CHAPTER 3 INTERRUPT
Compensation value (Z)
+4
+1
+4
0
+2
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