Oscillation Stabilization Wait Time - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 5 CLOCK
5.5

Oscillation Stabilization Wait Time

When power is turned on, the stop mode is quit, or the clock mode changes from the
sub to main or PLL clock, the oscillation stabilization wait time is required after the
oscillation begins. This is because the oscillation of the oscillation clock remains in
stopped state. Also when the clock mode changes from main to PLL, the oscillation
stabilization wait time is required after the PLL oscillation begins.
Oscillation Stabilization Wait Time
In general, ceramic and crystal oscillators require several milliseconds to some tens of milliseconds until
the they provide stable oscillation at their natural frequency (oscillation frequency). Accordingly, CPU
operation is disabled immediately after the oscillation starts and the clock supply to the CPU is enabled
until the oscillation stabilization wait time has elapsed. This gives the oscillation time to stabilize. It is
necessary to select a oscillation stabilization wait time appropriate to an oscillator to be used because the
oscillation stabilization time depends on the type of oscillator (crystal, ceramic, etc.). The oscillation
stabilization wait time can be selected by setting in the clock selection register (CKSCR).
When changing the clock mode from main to PLL, the CPU operates with the main clock during the PLL
oscillation stabilizing wait time before the mode actually changes to PLL.
Figure 5.5-1 shows the operation immediately after starting the oscillation.
Figure 5.5-1 Operation Immediately after the Start of Oscillation
X1
138
Oscillation time
of oscillator
Oscillation start Oscillation stabilization
Starting normal operation or
Oscillation stabilization
switching to PLL clock
wait time