Pwc Control Status Register (Pwcsr) - Fujitsu F2MC-16LX Hardware Manual

15.2.1

PWC Control Status Register (PWCSR)

Configuration and function of PWC control status register (PWCSR) are described.
PWC Control Status Register (PWCSR)
Figure 15.2-2 shows the bit configuration of PWC control status register (PWCSR).
Figure 15.2-2 Bit Configuration of PWC Control Status Register (PWCSR)
00005D
00005C
R/W : Readable/Writable
R : Read only
−
: Undefined
The function of each bit in the PWC control status register (PWCSR) is described in the following.
[bit 15, bit 14] STRT, STOP (Timer Start Bit, Timer Stop Bit)
This bit controls to start, restart, and stop the 16-bit up count timer. Timer operation status is displayed
when reading.
The table below shows the function of STRT and STOP bit.
Table 15.2-1 Functions for Write Operation (Controlling the 16-bit Up Count Timer
STRT
0
0
1
1
*: Enable use for clear bit instruction.
Table 15.2-2 Functions for Read Operation (Displaying the 16-bit Up-count Timer Operation Status)
STRT STOP
0 0
1 1
• Initialized to "0" at reset.
15 14 13 12
H STRT STOP EDIR EDIE OVIR OVIE
(R/W) (R/W) (R) (R/W) (R/W) (R/W)
7 6 5 4
H CKS1 CKS0 PIS1 PIS0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Operation)
STOP
0
1
0
1
Timer under suspension (unstarted or measurement completed). [initial value]
During timer count operating (during measurement).
11 10 9 8
ERR
Reserved
(R) (R/W)
3 2 1 0
S/C MOD2 MOD1 MOD0
Operation control functions
The influence is not in the function none/the operation.
Timer start/restart (count enabled).
Timer operation forced stop (count disabled).
The influence is not in the function none/the operation.
Operation control functions
CHAPTER 15 PWC TIMER
PWCSR
PWC control status register
Initial value 0000000X
B
PWCSR
PWC control status register
Initial value 00000000
B
*
*
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