Fujitsu F2MC-16LX Hardware Manual page 107

One descriptor channel of the 16 channels is selected by setting the DCSR. For details, see "3.8.3 DMA
Descriptor Window Register (DDWR) "
*: This function can use even when Mini-HOST is operated.
[bit15] STP:STP control bit
STP bit
0 [Initial value]
[bit14 to bit 12] Reserved: (reserved bit)
This bit is a reserved bit.
This bit is always "0" at the beginning of reading.
Please write "0".
Note:
Do not use any read modify write (RMW) instruction to access the DCSR register.
STP8 to STP15 is selected as DSSR.
1 STP0 to STP7 is selected as DSSR.
CHAPTER 3 INTERRUPT
Function
91