Operation Of Internal Clock Mode (Reload Mode) - Fujitsu F2MC-16LX Hardware Manual

16.3.2

Operation of Internal Clock Mode (Reload Mode)

It is synchronized with the internal count clock, the 16-bit counter performs the count
down, and the counter underflow generates the CPU interrupt request. Also can output
toggle waveforms from the timer output pin.
Operation of Internal Clock Mode (Reload Mode)
When the count operation is permitted (CNTE = 1 for TMCSR) and the timer is started by the software
trigger bit (TRG of TMCSR) or an external trigger, the reload register (TMRLR) value is loaded to the
counter and the counter operation is started.
When the counter permission bit and the software trigger bit are simultaneously set to "1", the count
operation starts at the same time of the counter permission. When the counter value underflows ("0000
"FFFF "), the 16-bit reload register (TMRLR) value is loaded to the counter and the count operation is
H
continued. At this moment, if the underflow interrupt request flag bit (UF) is set to "1" and the interrupt
request permission bit (INTE) is set to "1", the interrupt request occurs. In addition, the toggle waveform
which reverses at every underflow can be output from the TOT terminal.
Operation of Software trigger
When "1" is written to TRG bit of timer control status register (TMCSR), the counter is started.
Figure 16.3-4 shows the software trigger operation at reloading.
Figure 16.3-4 Count Operation (Software Trigger Operation) in the Reload Mode
Count clock
Counter
Data load
signal
UF bit
CNTE bit
TRG bit
TOT pin
T: Machine cycle
Operation of External trigger
When a valid edge (rising edge, falling edge, or both edges can be selected) is input to the TIN terminal, the
counter is started.
Figure 16.3-5 shows the external trigger operation in the reload mode.
−1
Reload Reload
0000
H
data data
T*
*: It takes 1T time from trigger input to loading of reload data.
CHAPTER 16 16-BIT RELOAD TIMER
−1 −1
Reload
0000
H
data
−1
Reload
0000
H
data
" →
H
397