Data Packet - Fujitsu F2MC-16LX Hardware Manual
16-bit microcontroller mb90330 series
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Also See for F2MC-16LX:
- Hardware manual (598 pages) ,
- Application note (13 pages) ,
- Operation manual (10 pages)
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CHAPTER 14 USB Mini-HOST
14.5.4
Data Packet
If a data packet is transmitted after a token packet has been sent, toggle data will be
transmitted based on the TGGL bit of the host token endpoint register (HTOKEN), and
the buffer data for endpoint 1 or endpoint 2 according to the DIR bit of the EP1 control
register (EP1C), CRC16 data, and EOP is sent. In the case of receiving a data packet, the
TGGL bit of the host token endpoint register (HTOKEN) and received toggle data are
compared, and, if they match, the received data is written to the buffer for endpoint 1 or
endpoint 2 based on the DIR bit of the EP1 control register (EP1C) and the CRC16 is
checked for an error.
Data Packet
After sending a token packet, the data packet is executed in the following procedure:
At Transmission
• Automatic sending of Sync
• DATA0 is transmitted when the TGGL bit of the host token endpoint register (HTOKEN) is "0" and
DATA1 is transmitted when the TGGL bit is "1".
• The buffer for endpoint 1 is selected when the DIR bit of the EP1 control register (EP1C) is "1" and
otherwise the one for endpoint 2 is selected when the DIR bit is "0" and all transmit data is sent.
• The CRC16-bit is sent.
• The EOP 2-bit is sent.
• The J State 1-bit is sent.
At Reception
• Reception of Sync
• The toggle data is received, and is compared with the TGGL bit of the host token endpoint register
(HTOKEN).
• If they match as a result of the comparison, the buffer for endpoint 2 is selected when the DIR bit of the
EP1 control register (EP1C) is "1" and the one for endpoint 0 is selected when the DIR bit is "0" and the
received data is written into it.
• When the EOF is received, the CRC16 bit is inspected.
You must set inversion data, respectively, in the DIR bits of the EP1 control register (EP1C) and EP2 control
register (EP2C) when the HOST bit of the host control register 0 (HCNT0) is "1". For example, when the DIR bit of
the EP1 control register (EP1C) is "0", the DIR bit of the EP2 control register (EP2C) is set to "1".
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