Fujitsu F2MC-16LX Hardware Manual page 636

APPENDIX
I/O direct (io)
Specify an 8-bit offset explicitly for the memory address in an operand. The I/O address space in the
physical address space from 000000
and direct page register (DPR). If a bank select prefix (for specifying a bank) is specified in front of an
instruction that uses this addressing mode, it is ignored.
MOVW A, i:0C0H
Before execution
After execution
Abbreviated direct address (dir)
Specify the eight low-order bits of a memory address explicitly in an operand. Bits 15 to 8 of the address
are specified by the direct page register (DPR). Bit 23 to Bit16 of the address are specified by the data bank
register (DTB).
MOV S;20H,A
Direct address (addr16)
Specify the 16 low-order bits of a memory address explicitly in an operand. Bit 23 to Bit 16 of the address
are specified by the data bank register (DTB). For this addressing, a prefix instruction for specifying access
space is ignored.
620
Figure B.3-5 Example of I/O Direct Addressing (io)
(This instruction reads data by I/O direct addressing and stores it in A.)
A 0 7 1 6
A 2 5 3 4
Figure B.3-6 Example of Abbreviated Direct Addressing (dir)
(This instruction writes the contents of the eight low-order bits of A in abbreviated
direct addressing mode.)
Before execution A 4 4 5 5
DPR 6 6
After execution
A 4 4 5 5
DPR 6 6
Figure B.3-7 Example of Direct Addressing (addr16)
(This instruction causes an unconditional branch.)
BRA 3B20H
Before execution
PC 3 C 2 0
After execution
PC 3 B 2 0
to 0000FF is accessed regardless of the data bank register (DTB)
H H
Memory space
2 5 3 4
0000C1 F F
H
0000C0 E E
H
F F E E
Memory space
1 2 1 2
DTB 7 7
776620
H
1 2 1 2
Memory space
DTB 7 7 776620
H
PCB 4 F
4F3C22
4F3C21
4F3C20
4F3B20
PCB 4 F
? ?
1 2
Memory space
F F
H
F E
H
6 0
H
Next
H
instruction
BRA 3B20H