Chapter 12 16-Bit I/O Timer; Overview Of 16-Bit I/O Timer - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 12 16-BIT I/O TIMER

12.1

Overview of 16-bit I/O Timer

The 16-bit I/O timer consists of one 16-bit free-run timer, and four output compare and
four input capture modules. This function enables four independent waveforms to be
output based on the 16-bit free-run timer, and input pulse widths and external clock
cycle to be measured.
Configuration Function of 16-bit I/O Timer
The functions of a 16-bit free-run timer, output compare, and input captures that make up the 16-bit I/O
timer are as follows:
16-bit free-run timer (x1)
The 16-bit free-run timer consists of a 16-bit up counter, control register, and prescaler. A value output
from the timer counter is used as a basic time by the input capture and output compare. Clock for the
counter operation can be selected from eight types (Φ: Machine clock).
• Eight types of internal clocks (Φ,Φ/2,Φ/4,Φ/8,Φ/16,Φ/32,Φ/64,Φ/128)
• Either the internal or external clock (FRCK) for the basic machine clock can be selected.
An interrupt can be generated through the overflow of the counter value and comparing match with the
compare clear register (Mode setting is required for comparing match).
The count value can be initialized to "0000
with compare clear register 0.
Output compare (x4)
The output compare consists of four 16-bit compare registers, compare output latch, and control registers. It
can reverse the output level and at the same time generate an interrupt when the 16-bit free-run timer value
matches that of the compare registers.
• Four compare registers are operated independently of each other. There are an output pin and interrupt
flag that correspond to each compare register.
• The output pin can be controlled by pairing two compare registers.
• The initial value of the output pin can be set.
• An interrupt can be generated by a comparing match.
Input capture (x4)
The input capture consists of four independent external input pins and associated capture and control
registers. It can detect an arbitrary edge of the signal input from external input pin to generate an interrupt
while holding the 16-bit free-run timer value in the capture register.
• The edge of an external input signal is optional. The external input signal edge can be selected from a
rising edge, falling edge, or both edges.
• Four input capture can operate independently.
Interrupts can be generated through valid edges of external input signals. The input capture can activate
µDMAC via interrupt.
238
" with reset, software clear, and compare match operations
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