Fujitsu F2MC-16LX Hardware Manual page 62

CHAPTER 2 CPU
Interrupt Suppression Instruction
The interrupt request is not sampled for the following 10 types of instructions:
MOV ILM,#imm8/PCB/SPB/OR CCR,#imm8/NCC
AND CCR,#imm8/ADB/CMR/POPW PS/DTB
When a valid interrupt request occurs during the execution of one of the above instructions, the interrupt
can be processed only if an instruction other than the above is executed. For the details, see Figure 2.4-1.
Interrupt request
Constraints on Interrupt Suppression Instructions and Prefix Instructions
When a prefix code precedes the interrupt suppression instruction, the prefix code affects up to the first
instruction after codes other than interrupt suppression instructions as shown in Figure 2.4-2.
Figure 2.4-2 Interrupt Suppression Instruction and Prefix Code
MOV A, FF
H
Array of Prefix Code
If conflicting prefix codes continue, the last one is valid as shown in Figure 2.4-3.
The conflicting prefix code means the PCB, ADB, DTB, and SPB as shown in Figure 2.4-3.
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Figure 2.4-1 Interrupt Suppression Instruction
Interrupt suppression instruction
Interrupt suppression instruction
NCC
MOV LIM, #imm8
Figure 2.4-3 Array of Prefix Codes
Prefix code
ADB DTB
(a)
Interrupt acceptance
CCR is not changed by NCC.
PCB ADD A, 01
H
PCB is enabled as prefix code.
(a) Normal request
ADD A, 01
H
CCR : XXX10XX
B