Fujitsu F2MC-16LX Hardware Manual page 303

[bit 13 to bit 11] Reserved bit
These bits are reserved bits. Writing has no effect on the operation. Reading is indeterminate.
[bit 10] DRQI: Transmission data interrupt request bit
It indicates that IN packet has been successfully transferred from the EP0 host, data has been read from
the transmission buffer, and the next transmit data can be written into the buffer. The DRQI bit is a
interrupt factor and writing "1" is ignored. Please clear by writing "0". "1" is read at the read
modification write.
DRQI
0
1
Note:
After the data write of the transmission buffer is processed, the DRQI must be cleared. Also, when
the DRQI is not set, writing "0" is prohibited. When the DRQI is set to "1", writing data to the
transmission buffer is enabled. Furthermore, it indicates the data is set to the transmission buffer at
the time of clearing. Therefore, when IN packet request is performed with DRQI bit set "1", the NAK
is responded to the HOST automatically.
[bit 9 to bit 0] Reserved bit
These bits are reserved bits. Writing has no effect on the operation. Reading is indeterminate.
Clearing interrupt cause
Writing transmit data enable state
CHAPTER 13 USB FUNCTION
Operating mode
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