Serial Mode Register 0 To 3 (Smr0 To Smr3) - Fujitsu F2MC-16LX Hardware Manual

21.4.2

Serial Mode Register 0 to 3 (SMR0 to SMR3)

The serial mode registers 0 to 3 (SMR0 to SMR3) are responsible for selecting operation
modes, setting pins related to serial data and cock to be enabled or disabled, and
setting how many bit to transfer ranging from 1to 8 bits, setting the serial clock output
level in the inactive operation (fixed to "L" and "H").
Serial Mode Register 0 to 3 (SMR0 to SMR3)
Address
ch0 : 000020
ch1 : 000026
ch2 : 00002C
ch3 : 000032
: Readable/Writable
R/W
: Initial value
Figure 21.4-3 Serial Mode Register 0 to 3 (SMR0 to SMR3)
bit15 bit8 bit7
H
MD1 MD0 SCKL M2L2 M2L1 M2L0 SCKE SOE
(SCR0 to SCR3)
H
H
R/W
H
SOE
SCKE
MD1 MD0
bit6 bit5 bit2
bit4 bit3
R/W R/W
R/W R/W R/W
Serial data output enable bit
0 As general-purpose port
1
As Serial data output pin of UART
Serial clock input/output enable bit
As general-purpose port or Clock input pin of UART0/1
0
1 As Clock output pin of UART
Synchronous mode transfer number setting bit
M2L2 to M2L0
Transfer number: 8 bit
"000 "
B
Transfer number: 1 bit
"001 "
B
Transfer number: 2 bit
"010 "
B
Transfer number: 3 bit
"011 "
B
Transfer number: 4 bit
"100 "
B
Transfer number: 5 bit
"101 "
B
Transfer number: 6 bit
"110 "
B
"111 " Transfer number: 7 bit
B
Serial clock output level setting bit
SCKL
0 Serial clock output "L" level when not operating
1 Serial clock output "H" level when not operating
Operation mode selection bit
Operation mode
0 0 0 Asynchronous mode (Normal mode)
1 1 Asynchronous mode (multiprosessor mode)
0
1 0 Synchronous mode (Normal mode)
2
1 1 Setting disabled
CHAPTER 21 UART
Initial value
bit1 bit0
00100000
B
R/W R/W
485