Fujitsu F2MC-16LX Hardware Manual page 428

CHAPTER 17 8/16-BIT PPG TIMER
[bit 10, bit 9] MD1, MD0: ppg count Mode (operation mode selection)
The operation mode of the PPG timer is selected.
MD1
0
0
1
1
• This bit is initialized to "0" at reset.
• Reading and writing are allowed.
Notes:
• Please set neither MD1 nor MD0 bits in "10
• Do not set the PPGC0 PEN0 bit and the PPGC1 PEN1 bit to "01
MD0 bits to "01
to "11 " or "00
B
• Set the PEN0/PEN1 to "11
"11 " by updating the PPGC0/PPGC1 via the word transfer.
B
[bit 8] Reserved bit
It is Reserved bit. Always set this bit to "1".
412
MD0
0 Byte PPG2 channel independent mode (The case
multiplied by 3 is enabled).
1 8-bit prescaler + 8-bit PPG 1channel.
0 Reserved (Setting prohibited).
1 16-bit PPG1 channel mode (The case multiplied by 3 is
enabled).
". In addition, the PEN0 and PEN1 bits are recommended to simultaneously set
B
".
B
" or "00
B B
Operating mode
".
B
" simultaneously, when setting the MD1 and MD0 bits to
" when setting the MD1 and
B