Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2308

DMA Tx Descriptor Current Register
The
EMAC_DMA2_TXDSC_CUR
Figure 31-84: EMAC_DMA2_TXDSC_CUR Register Diagram
Table 31-116: EMAC_DMA2_TXDSC_CUR Register Fields
Bit No.
(Access)
31:0 ADDR
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register contains the current DMA transmit descriptor.
15 14
0 0
ADDR[15:0] (R)
Host Transmit Descriptor Address
31 30
0 0
ADDR[31:16] (R)
Host Transmit Descriptor Address
Bit Name
Host Transmit Descriptor Address.
The EMAC_DMA2_TXDSC_CUR.ADDR bit field points to the start address of the
current Transmit Descriptor read by the DMA. Pointer updated by DMA during oper-
ation. Cleared on Reset.
13 12 11 10 9 8 7 6
0 0 0 0 0 0 0 0
29 28 27 26 25 24 23 22
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x EMAC Register Descriptions
5 4 3 2 1 0
0 0 0 0 0 0
21 20 19 18 17 16
0 0 0 0 0 0
31–217