Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2214

Sharc+ processor
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MAC Address 1 Low Register
The
EMAC_ADDR1_LO
ADDRLO[31:16] (R/W)
Mac Address
Figure 31-26: EMAC_ADDR1_LO Register Diagram
Table 31-58: EMAC_ADDR1_LO Register Fields
Bit No.
(Access)
31:0
ADDRLO
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register Contains the lower 32 bits of the second MAC address.
15
0
ADDRLO[15:0] (R/W)
Mac Address
31
0
Bit Name
Mac Address.
The EMAC_ADDR1_LO.ADDRLO bit, contains the lower 32 bits of the first 6-byte
MAC address. This is used by the MAC for filtering the received frames and inserting
the MAC address in the Transmit Flow Control (Pause) Frames.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
22
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x EMAC Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
21
20
19
18
17
16
0
0
0
0
0
0
0
31–123

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