Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2193

EMAC Programming Model
In the processor, any of the GPIO pins can be a used as a PHYINT signal. Use the following procedure to configure
a GPIO as a PHYINT signal.
1. Program the GPIO to detect a falling or rising edge sensitive interrupt.
2. Program the PHY to generate the interrupt on a signal status change.
3. If PHYINT is asserted, read the PHY status register through the station management interface.
The PHYINT is not part of EMAC module. However, any GPIO pin can be configured to interrupt the
NOTE:
processor when a rising edge generated by PHY is detected.
Refer to the PORT chapter for more info on configuring GPIO pins for input.
EMAC Programming Model
This section provides the programming model of Ethernet MAC peripheral for developers.
EMAC Programming Steps
The following sections provide some general programming information. The steps are written for EMAC DMA0,
but apply to DMA1 and DMA2 as well.
DMA Initialization
Use the following procedure to initialize DMA. This procedure applies to all DMA channels.
1. Perform a software reset by setting the EMAC_DMA0_BUSMODE.SWR bit. This action resets all of the EMAC
internal registers and logic.
2. Wait for the completion of the reset process by polling the EMAC_DMA0_BUSMODE.SWR bit which is only
cleared (automatically) after the reset operation completes.
3. Poll the EMAC_DMA0_BMSTAT.BUSRD and EMAC_DMA0_BMSTAT.BUSWR bits to confirm that all previ-
ously initiated (before software-reset) or ongoing SCB transactions are complete.
4. Program the required fields in the
a. Address aligned bursts
b. Fixed burst or undefined burst
c. Burst length values and burst mode values
d. Descriptor length (only valid when using ring mode)
5. Program the SCB interface options in the
then select the maximum burst-length possible on the SCB bus (bits EMAC_DMA0_BMMODE.BLEN4,
EMAC_DMA0_BMMODE.BLEN8, EMAC_DMA0_BMMODE.BLEN16).
31–102
EMAC_DMA0_BMMODE
EMAC_DMA0_BMMODE
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register:
register. If fixed burst-length is enabled,