Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2259

Sharc+ processor
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ADSP-SC58x EMAC Register Descriptions
DMA Missed Frame Register
The
EMAC_DMA1_MISS_FRM
MISSFRUN (RC)
Missed Frames Unavailable Buffer
OVFFIFO (RC)
Overflow bit for FIFO Overflow Counter
MISSFROV (RC)
Missed Frames Buffer Overflow
Figure 31-53: EMAC_DMA1_MISS_FRM Register Diagram
Table 31-85: EMAC_DMA1_MISS_FRM Register Fields
Bit No.
(Access)
28
OVFFIFO
(RC/NW)
27:17
MISSFROV
(RC/NW)
16
OVFMISS
(RC/NW)
15:0
MISSFRUN
(RC/NW)
31–168
register contains counters for EMAC DMA missed frames and buffer overflows.
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
Bit Name
Overflow bit for FIFO Overflow Counter.
The EMAC_DMA1_MISS_FRM.OVFFIFO bit holds the overflow bit for FIFO
Overflow Counter.
Missed Frames Buffer Overflow.
The EMAC_DMA1_MISS_FRM.MISSFROV bits indicate the number of frames
missed by the application due to buffer overflow.
Overflow bit for Missed Frame Counter.
The EMAC_DMA1_MISS_FRM.OVFMISS bit holds the overflow bit for the Missed
Frame Counter.
Missed Frames Unavailable Buffer.
The EMAC_DMA1_MISS_FRM.MISSFRUN bits indicate the number of frames
missed by the controller because of the Application Receive Buffer being unavailable.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
Description/Enumeration
OVFMISS (RC)
Overflow bit for Missed Frame Counter

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