1MRK505222-UUS C
Technical reference manual
V
a
a>b
Vpickup>
b
ANSI10000100 V2 EN
Figure 267:
Detailed logic diagram for step 1, Definite time delay, DT operation
Pickup1
PICKUP
TRIP
tReset1
t1
ANSI10000037 V2 EN
Figure 268:
Example for Definite Time Delay stage 1 reset
tReset1
t1
t
t
OFF
ON
Delay
Delay
Section 8
Voltage protection
PU_ST1
TRST1
AND
ANSI10000100-2-en.vsd
ANSI10000037-2-en.vsd
523