ABB Relion 670 Series Technical Reference Manual page 818

Section 13
Scheme communication
13.5.2
13.5.2.1
812
protection including a channel transmission time, can be achieved. This short operate
time enables rapid autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection enables
blocking as well as permissive under/overreaching schemes. The logic can also be
supported by additional logic for weak-end infeed and current reversal, included in
Current reversal and weak-end infeed logic for residual overcurrent protection
(ECRWPSCH, 85) function.
Principle of operation
The four step directional residual overcurrent protection EF4PTOC (51N/67N) is
configured to give input information, that is directional fault detection signals, to the
ECPSCH (85) logic:
• Input signal PLTR_CRD is used for tripping of the communication scheme,
normally the pickup signal of a forward overreaching step of STFW.
• Input signal CS_STOP is used for sending block signal in the blocking
communication scheme, normally thepickup signal of a reverse overreaching step
of STRV.
• Input signal CSUR is used for sending permissive signal in the underreaching
permissive communication scheme, normally the pickup signal of a forward
underreaching step of STINn, where n corresponds to the underreaching step.
• Input signal CSOR is used for sending permissive signal in the overreaching
permissive communication scheme, normally the pickup signal of a forward
overreaching step of STINn, where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to the
BLKCS input for blocking of the function at a single phase reclosing cycle.
Blocking scheme
In the blocking scheme a signal is sent to the other line end if the directional element
detects a ground fault in the reverse direction. When the forward directional element
operates, it trips after a short time delay if no blocking signal is received from the
opposite line end. The time delay, normally 30 – 40 ms, depends on the
communication transmission time and a chosen safety margin.
One advantage of the blocking scheme is that only one channel (carrier frequency) is
needed if the ratio of source impedances at both end is approximately equal for zero
and positive sequence source impedances, the channel can be shared with the
impedance measuring system, if that system also works in the blocking mode. The
communication signal is transmitted on a healthy line and no signal attenuation will
occur due to the fault.
1MRK505222-UUS C
Technical reference manual