Fujitsu F2MCTM-16LX Hardware Manual page 91

CPU
Note:
• The area that can be specified by IOA is between 000000
• The area that can be specified by BAP is between 000000
• The maximum transfer count that can be specified by DCT is 65,536.
Structure
2
EI OS is handled by the following 4 sections:
Internal resources
Interrupt enable and request bits: Used to control interrupt requests from resources.
Interrupt controller
ICR: Assigns interrupt levels, determines the priority levels of simultaneously requested interrupts, and
selects the EI
CPU
I and ILM: Used to compare the requested and current interrupt levels and to identify the interrupt
enable status
Microcode: EI
RAM
Descriptor: Describes the EI
Figure 3.7-1 Outline of Extended Intelligent I/O Service
Memory space
by IOA
I/O register
ISD
by BAP
Buffer
2
OS operation.
2
OS processing step
2
OS transfer information.
I/O register
· · · · · · · · · · · · · · ·
Interrupt request
by ICS
Interrupt control register
Interrupt controller
I/O requests transfer.
Interrupt controller selects descriptor.
by
Transfer source and destination
DCT
are read from descriptor.
Data is transferred between I/O
and memory.
and 00FFFF
H
and FFFFFF
H
CHAPTER 3 INTERRUPTS
Peripheral
.
H
.
H
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