Reception Interrupt Enable Register (Rier) - Fujitsu F2MCTM-16LX Hardware Manual

CHAPTER 21 CAN CONTROLLER
21.4.20

Reception Interrupt Enable Register (RIER)

Reception interrupt enable register (RIER) enables or disables the reception interrupt by
the message buffer (x).
The reception interrupt is generated at reception completion (when RCx of the reception
completion register (RCR) is 1).
Register Configuration
Figure 21.4-20 Configuration of the Reception Interrupt Enable Register (RIER)
Address
CAN1: 00008F
Address
CAN1: 00008E
R/W : Read/Write
Register Function
0: Reception interrupt disabled.
1: Reception interrupt enabled.
476
bit15 bit14 bit13
RIE15 RIE14 RIE13
H
R/W R/W R/W
bit7 bit6 bit5
RIE7 RIE6 RIE5
H
R/W R/W R/W
bit12 bit11 bit10
RIE12 RIE11 RIE10 RIE9
R/W R/W R/W R/W
bit4 bit3 bit2
RIE4 RIE3 RIE2 RIE1
R/W R/W R/W R/W
bit9 bit8 RIER1(Upper)
RIE8 Reset value
0 0 0 0 0 0 0 0
R/W
bit1 bit0 RIER1(Lower)
RIE0 Reset value
0 0 0 0 0 0 0 0
R/W
B
B