Standby Mode - Fujitsu F2MCTM-16LX Hardware Manual

8.5

Standby Mode

The standby mode causes the standby control circuit to either stop supplying an
operation clock to the CPU or peripheral functions or to stop the oscillation clock
reducing power consumption.
Operation Status during Standby Mode
Table 8.5-1 shows operation status during standby mode.
Table 8.5-1 Operation Status during Standby Mode
Mode name Transition
conditions
Sleep Main sleep MCS=1
mode mode SCS=1
SLP=1
Sub-sleep MCS=X
mode SCS=0
SLP=1
PLL sleep MCS=0
mode SCS=1
SLP=1
Timebase SPL=0 MCS=X
timer SCS=1
mode TMD=0
SPL=1 MCS=X
SCS=1
TMD=0
Watch SPL=0 MCS=X
mode SCS=0
TMD=0
SPL=1 MCS=X
SCS=0
TMD=0
Stop SPL=0 STP=1
mode
SPL=1 STP=1
Oscillation Sub-clock Machine
clock (SCLK)
(HCLK)
CHAPTER 8 LOW-POWER CONSUMPTION MODE
CPU Peripheral
clock function
*1
*1
*2
*2
Pin Release
method
External reset or
interrupt
External reset or
interrupt
External reset or
interrupt
External reset or
*4
interrupt
External reset or
Hi-Z
*4
interrupt
*3
External reset or
*5
interrupt
External reset or
Hi-Z
*5
interrupt
*3
External reset or
*6
interrupt
External reset or
Hi-Z
*6
*3 interrupt
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