Chip Erase/Sector Erase Command Sequence - Fujitsu F2MCTM-16LX Hardware Manual

Chip Erase/sector Erase Command Sequence

Figure C-4 Timing Diagram for Write Access (chip erasing/sector erasing)
AQ0
AQ18 to
CE
t
GHWL
OE
WE
t
DQ7 to DQ0
V
CC
t
VCS
Notes:
• SA is the sector address at erasing sector.
• The address is FxAAAA
• "Fx" in "FxAAAA" described as address is any of F.
t t
AS AH
Fx5555
FxAAAA
H
H
t
WP
t
WPH
CS
t
DH
AA 55
H H
t
DS
at erasing sector.
H
APPENDIX C Timing Diagrams in Flash Memory Mode
FxAAAA Fx5555
FxAAAA
H
H
80 AA
H H
SA*
H
55 10 /30
H H H
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