Block Diagram Of Timebase Timer - Fujitsu F2MCTM-16LX Hardware Manual

CHAPTER 11 TIMEBASE TIMER
11.2

Block Diagram of Timebase Timer

The timebase timer consists of the following blocks:
• Timebase timer counter
• Counter clear circuit
• Interval timer selector
• Timebase timer control register (TBTC)
Block Diagram of Timebase Timer
Timebase timer counter
1
2 /HCLK 2
Power-on reset
Stop mode
CKSCR : MCS=1 0*
CKSCR : SCS=0 1*
Timebase timer control register
Timebase timer interrupt signal
OF : Overflow
HCLK : Oscillation clock
*1 : For switching machine clock from main clock to PLL clock
*2 : For switching machine clock from sub clock to main clock
The actual interrupt request number of the timebase timer is as follows:
Interrupt request number: #25 (19
182
Figure 11.2-1 Block Diagram of Timebase Timer
To PPG timer
1 2 8
3
2 2 2
Counter
clear
1
circuit
2
TBOF clear
Re-
(TBTC)
served
)
H
9 10 11 12 13
2 2 2 2 2 2
OF
OF
Interval timer
selector
TBOF set
TBIE TBOF TBR
To watchdog
timer
14 15 16 17 18
2 2 2 2
OF
OF
To clock control part
oscillation stabilization
waiting time selector
TBC1 TBC0