Dlc Register X (X = 0 To 15) (Dlcrx) - Fujitsu F2MCTM-16LX Hardware Manual

21.4.25

DLC Register x (x = 0 to 15) (DLCRx)

This register is the DLC register for message buffer (x).
Register Configuration
Address
CAN1: 007C60
R/W : Read/Write
X : Undefined
−
: Unused
Register Function
Transmission
• Set the data length (byte count) of a transmitted message when a data frame is transmitted (TRTRx of
the transmitting RTR register (TRTRR) is 0).
• Set the data length (byte count) of a requested message when a remote frame is transmitted (TRTRx =
1).
Note:
Setting other than 0000
Reception
• Store the data length (byte count) of a received message when a data frame is received (RRTRx of the
remote frame request receiving register (RRTRR) is 0).
• Store the data length (byte count) of a requested message when a remote frame is received (RRTRx =
1).
Note:
A write operation to this register should be performed in words. A write operation in bytes causes
undefined data to be written to the upper byte at writing to the lower byte. Writing to the upper byte is
ignored.
Figure 21.4-25 Configuration of the DLC Registers (DLCRx)
bit7 bit6
+ 2 × x − −
H
− −
to 1000
B
bit5 bit4 bit3 bit2
− −
DLC3 DLC2
− −
R/W R/W
(0 to 8 bytes) is prohibited.
B
bit1 bit0 DLCR1x(Lower)
DLC1 DLC0 Reset value
XXXXXXXX
R/W R/W
x = 0, ..., 15
B
485