Block Diagram Of 16-Bit Reload Timer - Fujitsu F2MCTM-16LX Hardware Manual

CHAPTER 14 16-BIT RELOAD TIMER
14.2

Block Diagram of 16-bit Reload Timer

The 16-bit reload timers 2 and 3 composed of the following seven blocks:
• Count clock generator
• Reload controller
• Output controller
• Operation controller
• 16-bit timer register (TMR)
• 16-bit reload register (TMRLR)
• Timer control status register (TMCSR)
Block Diagram of 16-bit Reload Timer
16-bit timer register
Counter clock generating
circuit
Machine
clock
φ
Clear
Pin
TIN
Function selection
− −
Timer control status register (TMCSR)
240
Figure 14.2-1 Block Diagram of 16-bit Reload Timer
Internal data bus
TMRLR
16-bit reload register
TMR
CLK
Gate
Valid clock
input
3
Prescaler
judgement
circuit
Internal
clock
Input
Clock
control
selector
circuit
External clock
3
2
− − CSL1 CSL0 MOD2 MOD1
Reload signal
UF
Wait signal
Output control circuit
CLK
Output signal
generating
circuit
Select
signal
MOD0 OUTE OUTL RELD INTE UF CNTE TRG
Reload
control
circuit
Pin
TOT
EN
Operating
control circuit
Interrupt request
output