Overview Of Address Match Detection Function - Fujitsu F2MCTM-16LX Hardware Manual

CHAPTER 22 ADDRESS MATCH DETECTION FUNCTION
22.1

Overview of Address Match Detection Function

If the address of the instruction to be processed next to the instruction currently
processed by the program matches the address set in the detect address setting
registers, the address match detection function forcibly replaces the next instruction to
be processed by the program with the INT9 instruction to branch to the interrupt
processing program. Since the address match detection function can use the INT9
interrupt for instruction processing, the program can be corrected by patch processing.
Overview of Address Match Detection Function
• The address of the instruction to be processed next to the instruction currently processed by the program
is always held in the address latch through the internal data bus. The address match detection function
always compares the value of the address held in the address latch with that of the address set in the
detect address setting registers. When these compared values match, the next instruction to be processed
by the CPU is forcibly replaced by the INT9 instruction, and the interrupt processing program is
executed.
• There are six detect address setting registers (PADR0 to PADR5), each of which has an interrupt enable
bit. The generation of an interrupt due to a match between the address held in the address latch and the
address set in the detect address setting registers can be enabled or disabled for each register.
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