Fujitsu F2MCTM-16LX Hardware Manual page 89

Figure 3.6-1 Occurrence and Release of Software Interrupt
Save
(1) The software interrupt instruction is executed.
(2) Special CPU registers in the register file are saved according to the microcode corresponding to the
software interrupt instruction.
(3) The interrupt processing is completed with the RETI instruction in the user interrupt processing
routine.
Others
When the program bank register (PCB) is FF
INT #vct8 instruction. When designing software, ensure that the CALLV instruction does not use the same
address as that of the #vct8 instruction.
"Table D-2 Interrupt Causes, Interrupt Vectors, and Interrupt Control Registers" in APPENDIX D shows
the relationship of interrupt cause, interrupt vector, and interrupt control register in the MB90360 series.
(1)
Register file
(2)
Micro code
IR
MC-16LX • CPU
2
F
RAM
PS
PS I S
I
ILM
B unit
IR
B unit : Bus interface unit
Fetch
Queue
Instruction bus
, the CALLV instruction vector area overlaps the table of the
H
CHAPTER 3 INTERRUPTS
: Processor status
: Interrupt enable flag
: Interrupt level mask register
: Instruction register
73